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The previous section described how multiplexers select one channel from a group of input channels to be sent to a single output. Demultiplexers take a single input and select one channel out of a group of output channels to which it will route the input. It’s like having multiple printers connected to a computer.
A document can only be printed to one of the printers, so the computer selects one out of the group of printers to which it will send its output. The design of a demultiplexer is much like the design of a decoder.
The decoder selected one of many outputs to which it would send a zero. The difference is that the demultiplexer sends data to that output rather than a zero. The circuit of a demultiplexer is based on the non-active-low decoder where each output is connected to an AND gate.
An input is added to each of the AND gates that will contain the demultiplexer’s data input. If the data input equals one, then the output of the AND gate that is selected by the selector inputs will be a one.
If the data input equals zero, then the output of the selected AND gate will be zero. Meanwhile, all of the other AND gates output a zero, i.e., no data is passed to them. Image below presents a demultiplexer circuit with two selector inputs
In effect, the select lines, S0, S1, … Sn, “turn on” a specific AND gate that passes the data through to the selected output. In image above, if S1=0 and S0=1, then the D1 output will match the input from the Data line and outputs D0, D2, and D3 will be forced to have an output of zero.
If S1=0, S0=1, and Data=0, then D1=0. If S1=0, S0=1, and Data=1, then D1=1. Image below presents the truth table for the 1-line-to-4-line demultiplexer shown in image above

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