| Buffers |
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| Rarely does a processor operate in isolation. Typically there are multiple processors supporting the operation of the main processor. These include video processors, the keyboard and mouse interface processor, and the processors providing data from hard drives and CROMs. |
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| There are also processors to control communication interfaces such as USB, Firewire, and Ethernet networks. These processors all operate independently, and therefore one may finish an operation before a second processor is ready to receive the results. |
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| If one processor is faster than another or if one processor is tied up with a process prohibiting if it from receiving data from a second process, and then there needs to be a mechanism in place so that data is not lost. |
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| This mechanism takes the form of a block of memory that can hold data until it is ready to be picked up. This block of memory is called a buffer. Figure below presents the basic block diagram of a system that incorporates a buffer. |
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| The concept of buffers is presented here because the internal structure of a processor often relies on buffers to store data while waiting for an external device to become available. |
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| The Stack |
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| During the course of normal operation, there will be a number of times when the processor needs to use a temporary memory, a place where it can store a number for a while until it is ready to use it again. |
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| For example, every processor has a finite number of registers. If an application needs more registers than are available, the register values that are not needed immediately can be stored in this temporary memory. |
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| When a processor needs to jump to a subroutine or function, it needs to remember the instruction it jumped from so that it can pick back up where it left off when the subroutine is completed. The return address is stored in this temporary memory. |
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| The stack is a block of memory locations reserved to function as temporary memory. It operates much like the stack of plates at the start of a restaurant buffet line. When a plate is put on top of an existing stack of plates, the plate that was on top is now hidden, one position lower in the stack. |
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| It is not accessible until the top plate is removed. The processor’s stack works in the same way. When a processor puts a piece of data, a plate, on the top of the stack, the data below it is hidden and cannot be removed until the data above it is removed. This type of buffer is referred to as a “last-in-first-out” or LIFO buffer. |
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| There are two main operations that the processor can perform on the stack: it can either store the value of a register to the top of the stack or remove the top piece of data from the stack and place it in a register. |
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| Storing data to the stack is referred to as “pushing” while removing the top piece of data is called “pulling” or “popping”. The LIFO nature of the stack makes it so that applications must remove data items in the opposite order from which they were placed on the stack. |
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| For example, assume that a processor needs to store values from registers A, B, and C onto the stack. If it pushes register A first, B second, and C last, then to restore the registers it must pull in order C, then B, then A. |
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| I/O Ports |
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| Input/output ports or I/O ports refer to any connections that exist between the processor and its external devices. A USB printer or scanner, for example, is connected to the computer system through an I/O port. The computer can issue commands and send data to be printed through this port or receive the device’s status or scanned images. |
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| As described in the earlier section, some I/O devices are connected directly to the memory bus and act just like memory devices. Sending data to the port is done by storing data to a memory address and retrieving data from the port is done by reading from a memory address. |
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| In some cases, however, the processor has special hardware just for I/O ports. This is done in one of two ways: either the device interface hardware is built into the processor or the processor has a second bus designed to communicate with the I/O devices. |
